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    <title>New resource library resources in Embedded Community</title>
    <link>http://community.edc.intel.com/</link>
    <description>Embedded Community</description>
    <pubDate>Sun, 29 Nov 2009 12:36:04 GMT</pubDate>
    <dc:creator>Community</dc:creator>
    <dc:date>2009-11-29T12:36:04Z</dc:date>
    <item>
      <title>Atom-based MICA-101, Enhancing Quality and Efficiency of Healthcare</title>
      <link>http://community.edc.intel.com/t5/Hardware-Resources/Atom-based-MICA-101-Enhancing-Quality-and-Efficiency-of/idi-p/1686</link>
      <description>&lt;p align="left"&gt;Advantech Atom-based MICA-101 is 1 10.4&amp;quot; fanless Mobile Clinical Assiatant, main features&lt;/p&gt;&lt;p align="left"&gt;- Dual resistive and digitizer panels for touch operation and digital pen recognition&lt;br&gt;- Compact size, lightweight, and rugged ergonomic design&lt;br&gt;- Certified IP54 dust and water-splash proof sealed system&lt;br&gt;- Easy connectivity with Wi-Fi, Bluetooth and optional 3.5 G mobile communication&lt;br&gt;- Patient and asset identification through integrated camera and RFID reader&lt;br&gt;- Optional image based barcode scanner (no lasers), webcam and finger print reader&lt;br&gt;&lt;br&gt;See the video at:&lt;/p&gt;&lt;p align="left"&gt;&lt;a href="http://support.advantech.com/support/ResourceDetail.aspx?ResourceId=%7bC2F1F70E-97C2-4E36-ACF1-747063369D2" rel="nofollow" target="_blank"&gt;http://support.advantech.com/support/ResourceDetail.aspx?ResourceId=%7bC2F1F70E-97C2-4E36-ACF1-747063369D2&lt;/a&gt;&lt;/p&gt;</description>
      <pubDate>Thu, 26 Nov 2009 05:55:18 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Hardware-Resources/Atom-based-MICA-101-Enhancing-Quality-and-Efficiency-of/idi-p/1686</guid>
      <dc:creator>Joanna_advantec</dc:creator>
      <dc:date>2009-11-26T05:55:18Z</dc:date>
    </item>
    <item>
      <title>Core2Duo Digital Interactive Signage Station Introduction</title>
      <link>http://community.edc.intel.com/t5/Hardware-Resources/Core2Duo-Digital-Interactive-Signage-Station-Introduction/idi-p/1681</link>
      <description>&lt;p&gt;&lt;font size="2"&gt;Digital Interactive Signage Station is the newest marketing tool with a large screen and interactive self-service function. Full HD and a 700 cd/m2 high brightness LCD attracts all eyes. Two-way information satisfies both audience and owner. Mobile Features pr ... Digital Interactive Signage Station is the newest marketing tool with a large screen and interactive self-service function. Full HD and a 700 cd/m2 high brightness LCD attracts all eyes. Two-way information satisfies both audience and owner. Mobile Features  provide high flexibility and applications for use in various scenarios. &lt;/font&gt;&lt;/p&gt;&lt;p&gt;&lt;font size="2"&gt;&lt;/font&gt;&lt;/p&gt;&lt;p&gt;&lt;font size="2"&gt;See detail Flash Demo at &lt;/font&gt;&lt;a href="http://www.advantech.com.tw/epc/newsletter/DSS/dss_flashok3.swf" target="_blank" rel="nofollow"&gt;&lt;font size="2"&gt;http://www.advantech.com.tw/epc/newsletter/DSS/dss_flashok3.swf&lt;/font&gt;&lt;/a&gt;&lt;/p&gt;</description>
      <pubDate>Wed, 25 Nov 2009 05:38:41 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Hardware-Resources/Core2Duo-Digital-Interactive-Signage-Station-Introduction/idi-p/1681</guid>
      <dc:creator>Tifan_adventech</dc:creator>
      <dc:date>2009-11-25T05:38:41Z</dc:date>
    </item>
    <item>
      <title>Interactive Digital Signage Inject New Energy into Retail</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/Interactive-Digital-Signage-Inject-New-Energy-into-Retail/idi-p/1680</link>
      <description>&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;What is the most attractive way to stop customers in their tracks? Is it a dazzling sign, &lt;/font&gt;&lt;/span&gt;&lt;span&gt;&lt;font color="#000000"&gt;glamorous decorations or an elaborate display? Or is it something more attractive and fancier, empowering customers to access product information and promotions with the touch of a finger? This summer, Nike, the leading sporting goods superstore, and TK3C, a powerful retailer in electronics, have both chosen an interactive digital signage station (DSS) from Advantech’s Intelligent Services division (AiS) as their “ace” marketing strategies. The success and experience of these retailers is sure to lead to breakthrough applications for digital signage in the market. With AiS DSS (Intel Intel® Core2Duo) , retailers can expect to reach their customers in new and more innovative ways. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;/font&gt;&lt;/span&gt; &lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;Find out the detail case study of Raising Purchase Rate With the Move of a Finger at&lt;span&gt;&lt;strong&gt; &lt;/strong&gt;&lt;/span&gt;&lt;a href="http://www.advantech.com.tw/ais/digital-signage/CaseStudies.aspx?doc_id=%7bF9C8C479-2ADE-474C-9D78-0B5DCCA79FA" target="_blank" rel="nofollow"&gt;http://www.advantech.com.tw/ais/digital-signage/CaseStudies.aspx?doc_id=%7bF9C8C479-2ADE-474C-9D78-0B5DCCA79FA&lt;/a&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;</description>
      <pubDate>Wed, 25 Nov 2009 05:01:12 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/Interactive-Digital-Signage-Inject-New-Energy-into-Retail/idi-p/1680</guid>
      <dc:creator>Joanna_advantec</dc:creator>
      <dc:date>2009-11-25T05:01:12Z</dc:date>
    </item>
    <item>
      <title>2009 Embedded Innovator Magazine</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/2009-Embedded-Innovator-Magazine/idi-p/1658</link>
      <description>&lt;p&gt;&lt;a rel="nofollow" href="http://edc.intel.com/community/embedded-innovator/" target="_blank"&gt;&lt;img src="/t5/image/serverpage/image-id/144iE8A10F4117396C1C/image-size/original?v=mpbl-1&amp;amp;px=-1" border="0" alt="EmbeddedInnovator.jpg" title="EmbeddedInnovator.jpg" align="left" /&gt;&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Embedded Innovator Fall 2009&lt;/p&gt;
&lt;p&gt;Digital Magazine&lt;/p&gt;
&lt;p&gt; &lt;/p&gt;
&lt;p&gt;Includes articles:&lt;/p&gt;
&lt;blockquote&gt;
&lt;ul&gt;
&lt;li&gt;Making Software Simpler&lt;/li&gt;
&lt;li&gt;Building Next-generation Point-of-Sale Terminals and Kiosks &lt;/li&gt;
&lt;li&gt;Consolidating Hardware with Virtualization &lt;/li&gt;
&lt;li&gt;Stiumulus Spending brings Medical Applications to Life &lt;/li&gt;
&lt;li&gt;Cutton Rackmount Systems Down to Size &lt;/li&gt;
&lt;li&gt;A Smooth Path to Rugged Technology &lt;/li&gt;
&lt;li&gt;And More!&lt;/li&gt;
&lt;/ul&gt;
&lt;/blockquote&gt;
&lt;blockquote&gt;&lt;a rel="nofollow" href="http://edc.intel.com/community/embedded-innovator/" target="_blank"&gt;&lt;font size="3"&gt;&lt;strong&gt;Read Magazine &amp;gt;&amp;gt;&lt;/strong&gt;&lt;/font&gt;&lt;/a&gt;&lt;/blockquote&gt;</description>
      <pubDate>Wed, 18 Nov 2009 23:58:01 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/2009-Embedded-Innovator-Magazine/idi-p/1658</guid>
      <dc:creator>pmahler_intel</dc:creator>
      <dc:date>2009-11-18T23:58:01Z</dc:date>
    </item>
    <item>
      <title>Rich I/O and Broad Power Input Empowers Rail Control Systems</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/Rich-I-O-and-Broad-Power-Input-Empowers-Rail-Control-Systems/idi-p/1650</link>
      <description>&lt;p&gt;&lt;strong&gt;&lt;u&gt;Introduction:&lt;/u&gt;&lt;/strong&gt;&lt;/p&gt;&lt;p&gt;When it comes to automatic train supervision (ATS) with today's automatic train control (ATC) systems, it is most obvious that centralized traffic control (CTC) plays the key role in communications between operation control centers (OCC) and remote rail control systems. The CTC platform requires an abundant variety of communication ports for versatile usage and, above all, reliable operation. Advantech's ITA-2000 provides a vertical purpose platform to serve the needs of this field of application.&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="style1"&gt;&lt;strong&gt;&lt;u&gt;Solution&lt;/u&gt;&lt;/strong&gt;&lt;br&gt;To match current and adapt to future centralized traffic control requirements, an exceptionally functionaland flexible industrial processor system is crucial; one that can support a wide-range of DC and AC power input, plus has numerous front panel LEDs to keep operators visually informed of system status. In addition to low power consumption and fanless operation, other essential features include:&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Onboard memory for anti-vibration&lt;/li&gt;&lt;li&gt;Rich industrial communication port for RS-232/422/485, CANBus, and digital I/O&lt;/li&gt;&lt;li&gt;Embedded and real-time operating system support&lt;/li&gt;&lt;li&gt;4x gigabit Ethernet for LAN/WAN Redundant Communication &lt;/li&gt;&lt;li&gt;Support wide-Range AC and DC Power Input&lt;/li&gt;&lt;/ul&gt;&lt;p class="style1"&gt;&lt;span class="style1"&gt;&lt;strong&gt;System&lt;/strong&gt;&lt;/span&gt;&lt;br&gt;The ITA-2000 is a 2U rackmount platform for rack applications. All functions are based on a single board design to minimize vibration. It has a built-in Intel® Atom™ N270, 1.60 GHz CPU and comes standard with 2 x RS-232 and 8 x RS-232/422/485 isolated serial ports with automatic flow control and 128 KB FIFO, 2 x CANBus and digital I/O (8-ch DI/8-ch DO), 4 x 10/100/1000 Base-T Ethernet ports, PC/104+ extension, and 4 x USB 2.0. In addition, it supports an internal CF card and either a 3.5&amp;quot; or 2.5&amp;quot; SATA HDD.&lt;/p&gt;&lt;p class="style1"&gt;Featuring an isolated communication port for industrial applications and integrated embedded core software services, the ITA-2000 is the result of Advantech's mature technology and expertise.&lt;/p&gt;&lt;p class="style1"&gt; &lt;/p&gt;</description>
      <pubDate>Tue, 17 Nov 2009 14:40:06 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/Rich-I-O-and-Broad-Power-Input-Empowers-Rail-Control-Systems/idi-p/1650</guid>
      <dc:creator>Joanna_advantec</dc:creator>
      <dc:date>2009-11-17T14:40:06Z</dc:date>
    </item>
    <item>
      <title>ATOM-based Rail Transport Fare System</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/ATOM-based-Rail-Transport-Fare-System/idi-p/1647</link>
      <description>&lt;p&gt;Introduction: In modern railway stations, automatic fare collection (AFC) systems, including ticket vending machines (TVM), ticket checking machines (TCM), and gate controls, require compact-sized and fanless computing platforms that can provide fast and high capacity passenger fare data processing and communications. Money transaction data protection is also an essential component of AFC, one which obviously must be technologically safeguarded..&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p&gt;Solutions: Advantech's ITA-1000 vertical purpose platform is more than capable of fulfilling the requirements for fare processes. With low power consumption and fanless operation, embedded and real-time operating system support, as well as integrated embedded core software service, this compact system is most suitable for AFC applications. Additional elements include: • Compact Size Platform • Rich Industrial Communication Port for RS-232/422/485 and Digital I/O • Dual gigabit Ethernet for LAN/WAN Communication • Support wide-Range DC Power Input&lt;/p&gt;</description>
      <pubDate>Mon, 16 Nov 2009 14:26:58 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/ATOM-based-Rail-Transport-Fare-System/idi-p/1647</guid>
      <dc:creator>Joanna_advantec</dc:creator>
      <dc:date>2009-11-16T14:26:58Z</dc:date>
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      <title>Patient Infotainment Terminal Enhancing Hospital Stay Experiences</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/Patient-Infotainment-Terminal-Enhancing-Hospital-Stay/idi-p/1646</link>
      <description>&lt;p&gt;Patient Infotainment Terminals are bedside terminals that allow patients to do anything from watching movies and TV, to making phone calls, to playing games or communicating via the Internet. They can also be used for email, web browsing, accessing hospital intranets, or, if medically advisable, even work. Infotainment terminals can also be used to alert staff, call for help, and operate beds, lighting, and other devices.&lt;/p&gt; &lt;p&gt;Infotainment terminals can be used not only by patients, but also by medical staff and care givers. The latter may use them to look up electronic patient records, lab results, tests, monitor vital signs and their signals, document observations and changes, and more. To facilitate those functions, PITs may include RFID, digital cameras, and smart card readers for data capture and identification purposes.&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p&gt;This is a single integrated medical solution that provides digital entertainment, clinical services as well as communication to the point of care.&lt;/p&gt;&lt;div class="spacer10px "&gt; &lt;/div&gt;&lt;p&gt;See the product video at :&lt;a href="http://www.advantech.com/applied/StreamingAV/PIT_video_portal.htm" rel="nofollow" target="_blank"&gt;http://www.advantech.com/applied/StreamingAV/PIT_video_portal.htm&lt;/a&gt;&lt;/p&gt;</description>
      <pubDate>Mon, 16 Nov 2009 12:13:27 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/Patient-Infotainment-Terminal-Enhancing-Hospital-Stay/idi-p/1646</guid>
      <dc:creator>Joanna_advantec</dc:creator>
      <dc:date>2009-11-16T12:13:27Z</dc:date>
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      <title>Advantch Slim medical Point of Care Terminals improve Medical Quality &amp;amp; Efficiency</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/Advantch-Slim-medical-Point-of-Care-Terminals-improve-Medical/idi-p/1608</link>
      <description>&lt;p class="MsoNormal"&gt;&lt;span&gt;With 592 Beds, the Centre Hospitalier de Luxembourg is one of the biggest Hospitals in Luxembourg. Every year 25.000 people are under inpatient treatment there. Also, over 400.000 Patient were treated ambulant.&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt; &lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;A facility of this size requires a high administrative effort. So the Hospital started a search for a solution, which could speed up the clinical processes. &lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="2"&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;strong&gt;&lt;span&gt;Solution&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;The POC-S196-Terminals by Advantech are very space-saving but still provide a high performance, which allows to handle a big amount of data in a short time. And the opti&lt;/span&gt;&lt;span&gt;o&lt;/span&gt;&lt;span&gt;nal Touchscreen also simplify the operation of the device. Because of this, doctors and nurses can uses their time more productive.&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt; &lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;This facts allowed the Centre Hospitalier de Lusembourg to enhance the effectiveness of its facility. &lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt; &lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt; &lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;strong&gt;&lt;span&gt;System &lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;&lt;p&gt;&lt;font size="2"&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;With TFT LCD display and Intel Pentium engine, Advantech POC Terminals are designed to resist spill and water damage, and ensure dust resistance with their protected LDC and sealed enclosure. The POC-S196 is a 19”TFT-LCD Panel powered by a fanless Intel Core Duo processor, available with up to 4GB SDRAM and wireless LAN options. The quiet fanless design makes the slim series ideal for audio measurement. It is also ready for many POC applications. &lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="2"&gt; &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="2"&gt; &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;strong&gt;&lt;span&gt;Benefits&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font size="2"&gt;&lt;span&gt;- &lt;span&gt;Improved Efficiency&lt;/span&gt;&lt;/span&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;- Easy Monitoring and Access to Patient Information&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;- Enhanced Medical Quality&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt; &lt;/p&gt;</description>
      <pubDate>Wed, 04 Nov 2009 10:20:55 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/Advantch-Slim-medical-Point-of-Care-Terminals-improve-Medical/idi-p/1608</guid>
      <dc:creator>Joanna_advantec</dc:creator>
      <dc:date>2009-11-04T10:20:55Z</dc:date>
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      <title>The Star Topology of CompactPCI® Plus und CompactPCI® Plus IO</title>
      <link>http://community.edc.intel.com/t5/Hardware-Resources/The-Star-Topology-of-CompactPCI-Plus-und-CompactPCI-Plus-IO/idi-p/1603</link>
      <description>&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt;Author: Manfred Schmitz, Technical Director of MEN Mikro Elektronik&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt; &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt;Both PICMG 2.30 – the rear I/O definition of CompactPCI – and the extension of CompactPCI standard CPLUS.0 are based on a star topology.&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt; &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt;CompactPCI still uses the parallel PCI bus for communication between the system and peripheral boards. The maximum transmission speed of a parallel bus, however, is limited. Every additional board needs to share the bandwidth with the other bus participants. Also, the boards influence each other. Each one of the up to eight participants increases the electrical load on the bus, also reducing the theoretical maximum bandwidth of 33 MHz/32 bits with a peak data rate of 132 MB/s. If you increase the bus frequency to 133 MHz/64 bits (PCI-X), the maximum data rate goes up to 1 GB/s with only two possible participants – which is already a point-to-point connection with many lines.&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt; &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt;Modern architectures are no longer busses but point-to-point connections. Their electrical characteristics are easier to manage and they permit higher data transmission rates with less pins. With just one link (i.e. one differential receive and one transmit line), PCI Express already achieves 250 MB/s. The bandwidth of this connection is not restricted by other bus participants. There is no direct influence. A higher number of links for a connection or a higher clock frequency further increase the data rate (up to 16 GB/s with Gen3) – and all this with full duplex.&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt; &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;font size="2"&gt;&lt;font color="#000000"&gt;&lt;span&gt;&lt;font face="Helvetica"&gt;Classic computers such as PCs have a hierarchical structure. At its &amp;quot;center&amp;quot; there is the computer that is surrounded by peripherals like the points of a star. This is independent of how the peripherals are controlled: via PCI Express, USB or SATA. Ethernet is an exception – you can read more on this in the next issue. If you project this architecture to modular computers like CompactPCI, there are a few technical challenges for the system slot and the backplane. Because of the star topology, the system slot must now provide a large number of connections. The backplane must spread all of these connections to the peripheral slots without needing too many layers. In the end, the price of modular computers must be able to compete with classic standard solutions. Standards like &lt;/font&gt;&lt;/span&gt;&lt;span&gt;µ&lt;/span&gt;&lt;span&gt;&lt;font face="Helvetica"&gt;TCA have defined switched fabric slots for this reason. These route the data over special backplanes as desired.&lt;/font&gt;&lt;/span&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt; &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p align="left" class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="Helvetica" size="2"&gt;CompactPCI Plus intentionally does without such mechanisms. Its architecture does not need switches. The system slot is the center of the star. Each peripheral board is a symmetrical point. This is inexpensive and simple but assumes suitable connectors – which are now also available in rugged designs.&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;</description>
      <pubDate>Mon, 02 Nov 2009 15:26:57 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Hardware-Resources/The-Star-Topology-of-CompactPCI-Plus-und-CompactPCI-Plus-IO/idi-p/1603</guid>
      <dc:creator>fmagens@men</dc:creator>
      <dc:date>2009-11-02T15:26:57Z</dc:date>
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    <item>
      <title>Standardization of CompactPCI Plus: what does PICMG bring to the table?</title>
      <link>http://community.edc.intel.com/t5/Hardware-Resources/Standardization-of-CompactPCI-Plus-what-does-PICMG-bring-to-the/idi-p/1589</link>
      <description>&lt;p&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;Author: &lt;span&gt;By Eelco van der Wal, &lt;/span&gt;&lt;span&gt;Chairman PICMG Europe&lt;/span&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p&gt;&lt;span&gt;&lt;font color="#000000" face="arial,helvetica,sans-serif" size="2"&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;strong&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;strong&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;Introduction PICMG&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;Founded in 1994, PICMG's original mission was to extend the PCI standard, from the PCI Special Interest Group for use in non-traditional computer markets such as Industrial Automation, Medical, Military and Telecom. With the advent of fabric based transports, PICMG specs have continued to evolve. This has resulted in a series of specifications that include CompactPCI, AdvancedTCA, AdvancedMC, CompactPCI Express, COM Express and SHB Express. &lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;Writing specifications is only the first step. Implementing is the next step. And for this a wide community is needed, ranging from connector suppliers, backplane suppliers, racks, power supplies, and yes – computer modules like processing and I/O. Together with its members PICMG creates eco systems to support the acceptance of the specifications as well as the multiple sources of supply.&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font color="#000000" face="arial,helvetica,sans-serif" size="2"&gt;&lt;span&gt; &lt;/span&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;strong&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;Creating ecosystems as basis for the acceptance&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;In these days computer architectures like the serial CompactPCI Plus are complex. Because of this a multitude of different technologies comes together to standardize the architecture. Starting with the connector technology including simulation on the high speed data transfers, the next step is backplane technology with further simulation and real life measurements. And if these signals also can be delivered in the different topologies needed. Then the requirements on the power supply units come in. And racks, combined with cooling.&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;So even without the different suppliers for the computer modules itself, one needs already around 10 different suppliers to create an ecosystem at this level.&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="arial,helvetica,sans-serif" size="2"&gt;So in order to make a computer bus specification to become available and accepted in the market, one needs at least 20 suppliers supporting it and providing products ranging from connectors via racks to modules. This is what is often called an eco-system, supporting the market to accept an open standard. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font color="#000000" face="arial,helvetica,sans-serif" size="2"&gt;&lt;span&gt;One of the major benefits of such an open eco-system is that it provides extensive knowledge and experience on a broader scale then many in-house developments can ever build upon. And this broad and extensive knowledge is a pre requisite to provide state-of-the-art technologies like CompactPCI Plus to the open marketplace.&lt;/span&gt;&lt;/font&gt;&lt;/p&gt;</description>
      <pubDate>Wed, 28 Oct 2009 09:37:17 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Hardware-Resources/Standardization-of-CompactPCI-Plus-what-does-PICMG-bring-to-the/idi-p/1589</guid>
      <dc:creator>fmagens@men</dc:creator>
      <dc:date>2009-10-28T09:37:17Z</dc:date>
    </item>
    <item>
      <title>45nm technology enables a new class of exciting medical devices at Kontron</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/45nm-technology-enables-a-new-class-of-exciting-medical-devices/idi-p/1562</link>
      <description>&lt;p&gt;
&lt;li-video vid="Blb2d4OqbAHQuakyr_GReYCrBhdWTdc8" width="320" height="240" size="original" originalwidth="320" originalheight="240" uploading="false" thumbnail="http://ak.c.ooyala.com/Blb2d4OqbAHQuakyr_GReYCrBhdWTdc8/Ut_HKthATH4eww8X5hMDoxOjAzO_OPgf" align="center"&gt;&lt;/li-video&gt;&lt;/p&gt;</description>
      <pubDate>Tue, 20 Oct 2009 20:57:05 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/45nm-technology-enables-a-new-class-of-exciting-medical-devices/idi-p/1562</guid>
      <dc:creator>pmahler_intel</dc:creator>
      <dc:date>2009-10-20T20:57:05Z</dc:date>
    </item>
    <item>
      <title>Connector concept for Compact PCI Plus (CPlus.0)</title>
      <link>http://community.edc.intel.com/t5/Hardware-Resources/Connector-concept-for-Compact-PCI-Plus-CPlus-0/idi-p/1553</link>
      <description>&lt;p&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;&lt;em&gt;Authors: &lt;/em&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;&lt;em&gt;Ben Paagman, Senior Project Engineer, FCI Netherlands&lt;/em&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;font color="#000000"&gt;&lt;em&gt;Marco Pagnin, FAE, FCI Germany&lt;/em&gt;&lt;span&gt;             &lt;/span&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;&lt;/font&gt;&lt;/p&gt;&lt;p&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;FCI’s AirMax VSTM connector system &lt;span&gt;is the currently proposed connector system&lt;/span&gt; as the backplane interface for Compact PCI Plus (CPlus.0). AirMax VS™ is a shieldless High Speed connector system with pressfit technology.&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font color="#000000" size="2"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;The IMLAs accumulate the contact columns which are insulated from each other by air gaining the highest speed dielectric. (AirMax). &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font color="#000000" size="2"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;For CPCI+ a version was chosen with four signal pairs per column. As the amount of pairs gives the height of the connector, this is the ideal configuration to maintain the mechanical compatibility to the IEEE 1101. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;font color="#000000"&gt;&lt;span&gt;A&lt;/span&gt;&lt;span&gt;nother requirement for this application was to get 184 signal pairs (552 single contacts) into 95mm linear card edge, including coding to prevent plugging CPCI+ cards into common CPCI slots. Also it was decided by the PICMG to mount the receptacle part onto the backplane to prevent terminal stubbing on the backplane when card guiding is not optimal. &lt;/span&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;The AirMax &lt;/font&gt;&lt;a target="_blank" rel="nofollow"&gt;&lt;/a&gt;&lt;a target="_blank" rel="nofollow"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;VSTM&lt;/font&gt;&lt;/span&gt;&lt;/a&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt; connectors consists of single insert moulded leadframe assemblies, called IMLAs, which are mounted at a pitch of 2mm in a plastic front housing and a plastic retainer on the back side. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;div&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;&lt;/font&gt;&lt;/div&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;font color="#000000"&gt;&lt;span&gt;To protect the terminals of the header, AirMax VSTM is available with different wall configurations. Combining headers with a different wall count and a customized version with three walls, the headers are protected from all sides and to offering coding and guiding. &lt;/span&gt;&lt;span&gt;On the outer left side the header with the four walls and six IMLAs is placed ( P1 connector), aside the headers with two walls an eight IMLAs side by side and on the outer right side the header with three walls and eight IMLAs (P6 connector). The related receptacles are mounted onto the backplane. &lt;/span&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;As CPCI+ should also support next generation bus standards, like SATA3.0, PCIe2.0, USB3.0, etc, the backplane connectors must show excellent high speed performance at 10Gbit/s and more. Insertion Loss is less than 0,6 dB @ 10Gb/s and the worse case Crosstalk is less then 3% @ 50ps signal rise-time ( 10-90%)&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font color="#000000" size="2"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;Also the current carrying capacity is an important issue, as a minimum of 60W rating per card has to be supplied. Airmax VS™ is able to deliver this power with 6 terminals without a temperature rise of more than 30 ºC. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font color="#000000" size="2"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;font color="#000000"&gt;&lt;span&gt;A further requirement was the realisation of mezzanine applications on the plug-in boards. (Ethernet options).&lt;/span&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" color="#000000" size="2"&gt;Rear I/O applications, direct into the backplane and midplane are both possible to realize with AirMax VSTM&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;</description>
      <pubDate>Tue, 20 Oct 2009 11:31:58 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Hardware-Resources/Connector-concept-for-Compact-PCI-Plus-CPlus-0/idi-p/1553</guid>
      <dc:creator>fmagens@men</dc:creator>
      <dc:date>2009-10-20T11:31:58Z</dc:date>
    </item>
    <item>
      <title>3M™ Ultra Hard Metric (UHM) Connector for CompactPCI Plus</title>
      <link>http://community.edc.intel.com/t5/Hardware-Resources/3M-Ultra-Hard-Metric-UHM-Connector-for-CompactPCI-Plus/idi-p/1519</link>
      <description>&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;em&gt;&lt;span&gt;Author: Roland Nuiten and Tilo Remhof; 3M™ Deutschland GmbH&lt;/span&gt;&lt;/em&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="arial,helvetica,sans-serif" size="2"&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" face="arial,helvetica,sans-serif" size="2"&gt;Using modern high speed serial bus protocols, many System design engineers are looking for a boost in system performance. 2 mm hard-metric connector based designs have historically been unable to maximize performance and signal integrity due to severe crosstalk occurring at speeds greater than 1 Gbps. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt; &lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;span&gt;3M’s new Ultra Hard Metric Connector is the industry’s first fully-shielded, lowest crosstalk 2mm Hard Metric connector. It can improve and enable the performance of 2mm Hard Metric systems &lt;/span&gt;&lt;span&gt;without costly backplane redesigns or forklift upgrades. &lt;/span&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font color="#000000"&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;span&gt;&lt;font color="#000000" face="arial,helvetica,sans-serif" size="2"&gt;The UHM socket connector is designed to be intermateable to 2 mm hard-metric (IEC 61076-4-101) headers and compatible with 2 mm hard metric PCB footprints. It therefore helps enable much greater performance in legacy backplane designs. As a result, standard Compact PCI and VME 64x systems can support a high density multi-gigabit, high-speed serial IO protocols such as SAS, SATA, Rapid IO, PCI Express and Gigabit Ethernet. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="3"&gt;&lt;font color="#000000"&gt;&lt;font face="Times New Roman"&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" size="2"&gt;The patented “virtual coaxial box” shielding technology from 3M dramatically reduces the severe crosstalk commonly experienced at 1- to 1.5-Gbps speeds, allowing the new Ultra Hard Metric (UHM) socket connector from 3M to achieve speeds greater than 7 Gbps even when mated with standard unshielded 2 mm hard-metric headers. &lt;/font&gt;&lt;/span&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="3"&gt;&lt;font color="#000000"&gt;&lt;font face="Times New Roman"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="3"&gt;&lt;font color="#000000"&gt;&lt;font face="Times New Roman"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;span&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;&lt;font color="#000000"&gt;The “virtual coaxial box” provides a matched impedance signal path and gives the designer the freedom to drive 100 Ohm differential signal pairs in both columns and rows. This provides maximum signal density and performance, but also maintains compatibility to common column-differential pair configurations found in legacy HM-systems and cable applications.&lt;/font&gt; &lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="3"&gt;&lt;font color="#000000"&gt;&lt;font face="Times New Roman"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="3"&gt;&lt;font color="#000000"&gt;&lt;font face="Times New Roman"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" size="2"&gt;As an example, the crosstalk is evaluated for a HM-HM mated pair and HM-UHM mated pair with 2 neighbouring aggressor pairs. In the tested environment, even at 7Gb/s, the UHM maintains its excellent shielding properties and reduces crosstalk significantly. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="3"&gt;&lt;font color="#000000"&gt;&lt;font face="Times New Roman"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="3"&gt;&lt;font color="#000000"&gt;&lt;font face="Times New Roman"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;span&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif"&gt;&lt;font size="2"&gt;The modular design of the UHM socket connector from 3M also gives system design engineers the flexibility to design the right level of signal integrity while satisfying required mechanical constraints. Five-row (A, B, CL, CR, AB) and eight- row (D, E, DE, FL, FR) form factors are available for high signal density. In addition, the socket supports 100 ohm differential pairs in rows or columns. &lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="3"&gt;&lt;font color="#000000"&gt;&lt;font face="Times New Roman"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font size="3"&gt;&lt;font color="#000000"&gt;&lt;font face="Times New Roman"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;span&gt;&lt;font face="arial,helvetica,sans-serif" size="2"&gt;The new UHM socket connector from 3M is ideal for backplane applications using 2 mm hard-metric connector technology that require higher signal speeds combined with higher signal densities, such as VME bus (VME 64x) and CompactPCI backplane applications including test and measurement (PXI), process control, military, enterprise computing, telecommunications and factory automation.&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;</description>
      <pubDate>Thu, 08 Oct 2009 07:58:03 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Hardware-Resources/3M-Ultra-Hard-Metric-UHM-Connector-for-CompactPCI-Plus/idi-p/1519</guid>
      <dc:creator>fmagens@men</dc:creator>
      <dc:date>2009-10-08T07:58:03Z</dc:date>
    </item>
    <item>
      <title>Session Initiation Protocol (SIP) Enabled Firewall Appliance</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/Session-Initiation-Protocol-SIP-Enabled-Firewall-Appliance/idi-p/1509</link>
      <description>&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="Arial"&gt;Real-time communications have become an essential requirement for most enterprises. Whether it is through VOIP, multimedia conferences or instant-messaging, individuals and businesses can enjoy instant communications to save time and money. Generally, almost all instant communication connections are controlled by the Session Initiation Protocol (SIP), that initiates, modifies and terminates sessions between the participants. However, conventional network firewalls do not recognize SIP media, and whenever the firewall must relay SIP media packets for inspection, delays are caused during real-time communications. To speed up the inspection process, some firewalls create an automatic bypass for media packets, which creates a potential loophole for security threats.&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="Arial"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000"&gt;&lt;font face="Arial"&gt;More detail at &lt;a target="_blank" rel="nofollow" href="http://www.advantech.com.tw/networks-telecom/ApplicationDetail.aspx?doc_id={06A27402-E682-4E7B-A372-3D73DA46E83"&gt;http://www.advantech.com.tw/networks-telecom/ApplicationDetail.aspx?doc_id={06A27402-E682-4E7B-A372-3D73DA46E83&lt;/a&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;</description>
      <pubDate>Tue, 06 Oct 2009 13:31:07 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/Session-Initiation-Protocol-SIP-Enabled-Firewall-Appliance/idi-p/1509</guid>
      <dc:creator>Joanna_advantec</dc:creator>
      <dc:date>2009-10-06T13:31:07Z</dc:date>
    </item>
    <item>
      <title>Adoption of Symmetric Multiprocessing Using VxWorks® and Intel® Multi-Core Processors</title>
      <link>http://community.edc.intel.com/t5/Software-Tools-Resources/Adoption-of-Symmetric-Multiprocessing-Using-VxWorks-and-Intel/idi-p/1502</link>
      <description>&lt;p&gt;&lt;font size="1" face="Verdana"&gt;&lt;font size="1" face="Verdana"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;&lt;p align="left"&gt;&lt;font size="2"&gt;The challenge for embedded developers is identifying and extracting parallelism within serially designed applications and designing software so that it scales as the number of cores increases. Last fall we published a white paper that discusses the combined performance and SMP capabilities of the Intel&lt;/font&gt;&lt;font size="2"&gt;&lt;font face="Verdana"&gt;&lt;font face="Verdana"&gt;® &lt;/font&gt;&lt;/font&gt;&lt;font face="Verdana"&gt;&lt;font face="Verdana"&gt;Core™ microarchitecture and Wind River&lt;/font&gt;&lt;/font&gt;&lt;font face="Verdana"&gt;&lt;font face="Verdana"&gt;® &lt;/font&gt;&lt;/font&gt;&lt;font face="Verdana"&gt;&lt;font face="Verdana"&gt;VxWorks&lt;/font&gt;&lt;/font&gt;&lt;font face="Verdana"&gt;&lt;font face="Verdana"&gt;® &lt;/font&gt;&lt;/font&gt;&lt;font size="1" face="Verdana"&gt;&lt;font size="1" face="Verdana"&gt;&lt;font size="2"&gt;SMP operating &lt;font size="1" face="Verdana"&gt;&lt;font size="1" face="Verdana"&gt;&lt;font size="2"&gt;system and walks through SMP software design considerations, methodologies, and Wind River tools that help with each step of the Multi-Core software development cycle. &lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;font size="2"&gt;&lt;font size="1" face="Verdana"&gt;&lt;font size="1" face="Verdana"&gt;&lt;font size="2"&gt;&lt;font size="1" face="Verdana"&gt;&lt;font size="1" face="Verdana"&gt;&lt;font size="2"&gt;Don't miss this paper if you're considering adoption of SMP using VxWorks and Intel Multi-core processors.&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/font&gt;&lt;/p&gt;</description>
      <pubDate>Fri, 02 Oct 2009 20:00:59 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Software-Tools-Resources/Adoption-of-Symmetric-Multiprocessing-Using-VxWorks-and-Intel/idi-p/1502</guid>
      <dc:creator>lmatassa_intel</dc:creator>
      <dc:date>2009-10-02T20:00:59Z</dc:date>
    </item>
    <item>
      <title>Standard Backplanes for PICMG 2.30 and CPlus.0</title>
      <link>http://community.edc.intel.com/t5/Hardware-Resources/Standard-Backplanes-for-PICMG-2-30-and-CPlus-0/idi-p/1472</link>
      <description>&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;&lt;em&gt;Author: Andreas Lenkisch, Principal Engineer Backplanes at Schroff GmbH, Straubenhardt, Germany&lt;/em&gt;&lt;/font&gt;&lt;/span&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;br&gt;&lt;br&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000"&gt;&lt;font size="2"&gt;&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000"&gt;&lt;/font&gt;&lt;font size="2"&gt;&lt;font color="#000000"&gt;Hybrid backplanes for CompactPCI Plus from stock&lt;/font&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="Arial" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;PICMG 2.30 is an extension of the CompactPCI specification PICMG 2.0 and is currently undergoing a round of voting by PICMG.&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="Arial" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;CompactPCI PlusIO extends CompactPCI with the aim of providing a soft migration path to the CompactPCI Plus (PICMG Cplus.0) specification, which is now based solely on serial protocols. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="Arial" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;The modern serial interfaces such as PCI Express, SATA, USB and Ethernet that are lacking on CompactPCI are provided by a CompactPCI PlusIO (PICMG 2.30) CPU on the user-defined pins of the P2 connector of a 32-bit CPU board. From here a hybrid backplane designed to CompactPCI PlusIO (PICMG 2.30) connects these signals to peripheral CompactPCI Plus slots. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="Arial" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;The P2 connector of the CPU board is compatible with its predecessor from the hard-metric series. This allows the CompactPCI PlusIO CPU both to be used in earlier 32-bit CompactPCI systems and to support new CompactPCI Plus systems. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="Arial" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;System manufacturers participating in the specification process will offer a number of typical configurations as standard backplanes or standard systems as stock items. For certain applications further configurations are certain to become standard products in order to also create a basis for small projects. The next step will be to define 'pure' CompactPCI Plus backplanes and systems. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;font face="Arial" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;The illustrations show the existing configurations and those planned for the near future. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;div class="MsoNormal"&gt;&lt;font color="#000000"&gt;&lt;span&gt;&lt;font face="Arial" size="2"&gt;a hybrid backplane with 4 CompactPCI and 4 peripheral CompactPCI Plus slots&lt;/font&gt;&lt;/span&gt;&lt;/font&gt;&lt;/div&gt;&lt;/li&gt;&lt;li&gt;&lt;div class="MsoNormal"&gt;&lt;font color="#000000"&gt;&lt;span&gt;&lt;font face="Arial" size="2"&gt;a hybrid backplane with 3 CompactPCI and 2 peripheral CompactPCI Plus slots plus a slot for a CompactPCI PSU (to PICMG 2.11 with &amp;quot;P47&amp;quot; connector) &lt;/font&gt;&lt;/span&gt;&lt;/font&gt;&lt;/div&gt;&lt;/li&gt;&lt;li&gt;&lt;div class="MsoNormal"&gt;&lt;font color="#000000"&gt;&lt;span&gt;&lt;font face="Arial" size="2"&gt;a pure CompactPCI Plus backplane with 9 slots and&lt;/font&gt;&lt;/span&gt;&lt;/font&gt;&lt;/div&gt;&lt;/li&gt;&lt;li&gt;&lt;div class="MsoNormal"&gt;&lt;font color="#000000"&gt;&lt;span&gt;&lt;font face="Arial" size="2"&gt;a pure CompactPCI Plus backplane with approx. 3-5 slots (still at planning stage)&lt;/font&gt;&lt;/span&gt;&lt;/font&gt;&lt;/div&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p class="MsoNormal"&gt;&lt;font face="Arial" color="#000000" size="2"&gt; &lt;/font&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;Dual CPUs with sideboard or mezzanine expansion module for CompactPCI Plus, that support the old parallel bus and also the new architecture on separate slots, do not require special backplanes. Off-the-shelf single CPCI and Cplus backplanes may be combined in any required configuration, with any combination of slots. Left: a backplane can be configured with 1 to 8 CompactPCI slots; right: a CompactPCI Plus-compatible backplane with 1 to 9 slots. Power backplanes with 1 to 4 slots allow the configuration to be rounded down for small quantities. For projects requiring larger quantities, however, it will be economically more effective to design a special monolithic backplane to the project's exact requirements. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font face="Arial" color="#000000" size="2"&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;</description>
      <pubDate>Mon, 28 Sep 2009 08:58:10 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Hardware-Resources/Standard-Backplanes-for-PICMG-2-30-and-CPlus-0/idi-p/1472</guid>
      <dc:creator>fmagens@men</dc:creator>
      <dc:date>2009-09-28T08:58:10Z</dc:date>
    </item>
    <item>
      <title>CompactPCI® PlusIO Rear I/O</title>
      <link>http://community.edc.intel.com/t5/Hardware-Resources/CompactPCI-PlusIO-Rear-I-O/idi-p/1423</link>
      <description>&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" size="2" face="Helvetica"&gt;Author: Manfred Schmitz, Technical Director of MEN Mikro Elektronik&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" size="2" face="Helvetica"&gt;&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" size="2" face="Helvetica"&gt;PICMG 2.30 is an extension of the CompactPCI® standard PICMG 2.0 and is available as a draft at present. The CompactPCI® specification permits to lead user I/O to the backplane via 3U boards on the 32-bit system slot. These signals are often used to provide the modern serial buses like PCI Express, SATA, USB and Ethernet. Until now no standard existed, which led to incompatibilities between the boards of different manufacturers. This is particularly detrimental if rear I/O signals like PCI Express are used directly to build hybrid backplanes for CompactPCI Express. &lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" size="2" face="Helvetica"&gt;CompactPCI Plus IO – PICMG 2.30 – remedies this. It defines the pin assignment for four PCI Express links, four USB interfaces, four SATA interfaces and two Ethernet channels. In order to ensure electrical functionality a completely new but 100% compatible connector by 3M has been introduced as J2 connector. It is equipped with an additional internal shield so that it is able to support the required high freqencies even without additional ground pins.&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" size="2" face="Helvetica"&gt;The pin assignment has been chosen in such a way that a 32-bit PICMG 2.30 board can function in a 64-bit backplane. However, the rear I/O pins cannot be used in that case, because the pins are needed for the 64-bit extension. 64-bit PCI transmissions are not possible. In order not to lose all degrees of freedom, PICMG 2.30 still allows the usage of free pins for user-defined I/O. If you require only one Ethernet interface on the backplane and want to lead LVDS to the back for controlling a monitor, you can use the free pins of the second Ethernet interface for LVDS. The assignment has to be chosen in such a way though that an Ethernet device which might be connected to LVDS cannot be damaged.&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt;&lt;span&gt;&lt;font color="#000000" size="2" face="Helvetica"&gt;CompactPCI PlusIO - PICMG 2.30 - is a 100%-compatible extension of PICMG 2.0, which fits modern chip technology and enables the migration to new standards like CompactPCI Plus. Future CPU boards should be developed with regard to PICMG 2.30 compatibility. This ensures that boards of different manufacturers are inter-exchangeable and guarantees compatibility to following standards like CompactPCI Plus.&lt;/font&gt;&lt;/span&gt;&lt;/p&gt;&lt;p class="MsoNormal"&gt; &lt;/p&gt;</description>
      <pubDate>Thu, 17 Sep 2009 15:45:00 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Hardware-Resources/CompactPCI-PlusIO-Rear-I-O/idi-p/1423</guid>
      <dc:creator>fmagens@men</dc:creator>
      <dc:date>2009-09-17T15:45:00Z</dc:date>
    </item>
    <item>
      <title>In-Vehicle Infotainment Platform_Q2 2008</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/In-Vehicle-Infotainment-Platform-Q2-2008/idi-p/1420</link>
      <description />
      <pubDate>Thu, 17 Sep 2009 11:05:09 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/In-Vehicle-Infotainment-Platform-Q2-2008/idi-p/1420</guid>
      <dc:creator>JennyWang</dc:creator>
      <dc:date>2009-09-17T11:05:09Z</dc:date>
    </item>
    <item>
      <title>Industrial Platform Service_2008 Q2</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/Industrial-Platform-Service-2008-Q2/idi-p/1419</link>
      <description />
      <pubDate>Thu, 17 Sep 2009 11:01:08 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/Industrial-Platform-Service-2008-Q2/idi-p/1419</guid>
      <dc:creator>JennyWang</dc:creator>
      <dc:date>2009-09-17T11:01:08Z</dc:date>
    </item>
    <item>
      <title>Industrial Platform Service_2008 Q1</title>
      <link>http://community.edc.intel.com/t5/Applications-Other-Resources/Industrial-Platform-Service-2008-Q1/idi-p/1418</link>
      <description />
      <pubDate>Thu, 17 Sep 2009 10:51:57 GMT</pubDate>
      <guid>http://community.edc.intel.com/t5/Applications-Other-Resources/Industrial-Platform-Service-2008-Q1/idi-p/1418</guid>
      <dc:creator>JennyWang</dc:creator>
      <dc:date>2009-09-17T10:51:57Z</dc:date>
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